車用安全經理 職缺需求 .熟悉車用座艙域與ADAS晶片, 尤其是功能安全島的ISO26262功能安全需求展開 .客戶支持:提供跨領域的客戶技術支持, 確保客戶要求的安全需求能夠獲得滿足 .具有基於RTOS作業系統的軟體架構設計與軟體安全分析能力
We are looking for AI hardware architect/designer to join our team and play a pivotal role in designing, developing, and optimizing architecture of the neural processing unit (NPU). As an architect/designer, you will be responsible for creating innovative hardware and software solutions that meet the performance, scalability, and efficiency requirements of our advanced NPU environment. The ideal candidate will have a strong background in computer architecture, microarchitecture, and digital design, as well as experience with industry-standard tools and methodologies. You are expected to transform novel ideas into practical proposals for future NPU products, and vet the proposals via prototyping. Extensive knowledge in compiler and operating system is a plus. International travel may be required. 職缺需求 -- MS or PhD in electircal and computer engineering -- deep understanding of computer architecture, microarchitecture, and hardware description languages -- broad knowledge of software systems -- strong team work and communication skills -- strong hands-on coding skills
Responsible for RTL to GDS design and development activities of MediaTek’s Ghz ARM/Imagination-based graphics processors, AI processors and neural network DS. Involve in activities encompass physical design and analysis of complex and timing-critical graphics processor AI processors and neural network DSP. Technical disciplines include Physical Implementation (floor-planning, place and route, RC extraction, timing and power optimization) & signoff (DRC, LVS, STA, PI). 職缺需求 At least 4 years of experience in Physical Design and Signoff Skills: 1. Synthesis:: PPA improvement through synthesis recipe exploration for better perf, power, and area. 2. Physical design :: Floor Planning, Place & Route followed by Timing and Physical Closure 3. Signoff :: PI : PG mesh spec selection, Bump/RDL planning, IR closure PV : DRC, LVS, ANT, ERC closure STA : Block level timing closure
At MediaTek, we are at the forefront of enabling device+cloud hybrid architectures for generative AI. On-device AI offers significant advantages, including low latency, enhanced security, privacy, and personalization through fine-tuning to meet specific user needs. A critical component of this technology is the AI compiler, which involves code generation and optimization to maximize runtime performance and minimize memory footprint. We are seeking talented individuals to join our team and contribute to this cutting-edge field. Key Responsibilities: 1. Develop and optimize AI compilers for on-device applications. 2. Conduct performance analysis and implement optimizations for runtime efficiency and memory usage. 3. Work closely with customers to understand their needs and provide tailored AI solutions. 職缺需求 1. System Software Development: Proficiency in writing robust system software using C++. Experience with software development best practices, including version control, testing, and debugging. 2. Compiler Technology: Strong understanding of compiler technologies. Familiarity with ML compilers such as TVM, XLA, MLIR. Experience with LLVM/GCC backend development, including optimization analysis and implementation, is a plus. 3. Generative AI experience: Knowledge of generative AI and its applications. Familiarity with AI frameworks such as PyTorch, TensorFlow, and ONNX is a plus.
Machine Learning - Architect/Researcher/Engineer - Accelerator, Deployment and Infrastructure [Overview] MediaTek HQ is looking for Machine Learning Architect, Researcher, or Engineer who is passionate about System Platform, Software Engineering, and Applied Machine Learning (including Deep Learning and AI). This position is within MediaTek’s AI Group. This R&D role offers a dynamic environment, hands-on learning, and a unique opportunity to develop both Infrastructures and Accelerators for state-of-the-art (SOTA) machine learning, as well as to build applications utilizing SOTA machine learning techniques. You will join a team devoted to developing and deploying cutting-edge machine learning and deep learning algorithms, optimized for MediaTek’s NPU—and, conversely, optimizing our NPU for advanced ML/DL workloads. 職缺需求 [Responsibility] As a ML Architect, the major responsibility is to derive and define next generation NPU capability/architecture in an Application x HW x SW style. The other responsibility also includes learning and adopting relevant new technologies, framework, packages, processes and tools for NPU architecture. As a ML Researcher, the major responsibility is to conduct exciting research/development, present findings and transform these into practical technology. The other responsibility also includes learning and adopting relevant new technologies, framework, packages, processes and tools in the research. As an ML Engineer, the major responsibility is to solve problems and build innovative software solutions. The other responsibility also includes learning and adopting relevant new technologies, framework, packages, processes and tools in the proposed solutions. [Additional Responsibility] + Contribute ideas and publish high impact papers for the project that includes findings and results. + Create research prototypes exploring AI and its applications. + Contribute to the team by Accelerator, Deployment and/or Infrastructure + Make development impact by creating architectural changes if Accelerator + Make development impact by creating prototype if Deployment + Make development impact by creating solution (including SDK, API, … and documentation) if Infrastructure [Required Qualifications] + Master’s degree or higher in computer science, electrical engineering or related fields. + 2+ year experience in machine learning, deep learning, computer vision, signal processing, other ML topics. + 2+ year coding experience in python, C++, JAVA (at least one of). + Prior hands-on experience in ML frameworks (like Keras, Tensorflow, PyTorch, or …). [Preferred Qualifications] + Ph.D. candidate with publication experience in top conferences/journals, like ISSCC, VLSI, ISCA, MICRO, HPCA, DAC, PACT, PPOPP, CVPR, ICCV, ECCV, ICML, NeurIPS, IJCAI, AAAI, etc. + Demonstrated understanding of data structures, algorithms and/or other computer & software architecture factors that affect code quality, performance and user experience. + Experience creating research prototypes and the implementation of end-to-end machine learning pipeline. + Experience building prototype/software for hackathon, research project and so on. + Ability to conduct original and novel research. + Analytical and problem-solving skills. + Ability to both work alone and collaborate effectively with other team members. + Experience documenting findings, results and software documentation.
職務說明: - 開發相機開放平台功能 for Android手機、AI 相機功能、監控系統和汽車載具應用的相機系統軟體。 - 設計和實施嵌入式相機系統軟體，以支持不同產品線的相機功能。 - 與跨職能團隊合作，整合AI相機功能，車用安全相機軟體，確保符合功能安全標準。 - 為各種硬體平台（包括CPU、GPU和記憶體子系統等SoC組件）優化相機性能。 - 解決與相機系統相關的複雜軟體問題，有助於提高整體產品品質和用戶體驗。 加入聯發科多媒體團隊 (MM)： 加入聯發科的相機軟體工程師後將開啟創新與現實應用相遇的旅程。在聯發科，您將成為重新定義多種設備上相機體驗的核心團隊的一份子。您的專業知識將有助於創建令人驚艷的用戶體驗，讓用戶以無與倫比的清晰度和智能捕捉生活時刻。作為相機軟體領域的先驅，您將參與融合尖端人工智慧和強大相機系統的具有挑戰性和令人興奮的項目，確保每張快照或影片都講述一個故事。您的工作將不僅推動相機技術的發展，同時讓全世界圖像互動技術有著重大的影響力。 職缺需求 Minimum Qualifications: - 資訊工程、計算機科學、電機工程、機械工程或相關實務經驗的碩士學位，歡迎所有求職者與應屆畢業生。 - 具有一種或多種編程語言（以 C++ 為主, 或 C, Java 等語言）的開發經驗。 - 具有使用或設計 Data Structure 或 Algorithm Software等程式開發經驗 - 具有 Linux Kernel/user space 開發 & 嵌入式系統開發的經驗。 Preferred Qualifications: - 2年以上相機系統或嵌入式軟體開發經驗。 - 具有 AI 相機功能開發經驗 (跨多顆運算單元如 CPU/GPU/NPU 開發整合經驗) - 具有汽車安全規範 (ISO-26262、ISO-21434、MISRA C/CPP、AUTOSAR) 軟體開發流程的經驗。 - 具有 Android Camera HAL 或者 Linux user space 相機應用軟體開發經驗。 - 具有相機性能、功耗、記憶體用量最佳化、嵌入式處理器調教經驗 (例如 cache-friendly coding skill)。 - 具有 ISP (Image Signal Processing)、影像傳感器原理等知識。
1. 領導IC專案的軟體開發（功能開發與驗證） 2. 追蹤開發進度並解決技術問題 3. 與軟體/韌體團隊合作 4. 有與IC驗證團隊合作經驗者尤佳 職缺需求 具備以下至少一個領域的經驗： 1. 嵌入式系統開發經驗 2. 軟體配置管理，特別是使用GIT和Perforce 3. 大型專案中溝通與團隊合作能力 4. 出色的規劃與執行能力
1. AI視覺/視訊演算法開發，針對 MediaTek NPU 平台之 AI 演算法優化及部署開發 2. 前瞻AI演算法開發 (1) 生成式AI模型開發 (2) 類神經網路優化 (3) 無監督式學習 (4) 端側訓練 3. Edge/Datacenter AI平台軟體開發 4. 分布式訓練推理開發 職缺需求 1. 精通現代程式語言 (Python、C++ 等), AI/ML 框架 (PyTorch, JAX, Hugging Face, etc.) 2. 熟悉用於裝置之深度學習架構: TFLite, ONNX, ExecuTorch 3. 對於 GenAI 服務框架(vLLM, SGLang, etc) 和核心最佳化 (CUDA, Triton) 有經驗 4. 對於深度學習演算法及模型開發優化，以及訓練深度模型之方法有兩年以上經驗 5. 熟悉軟體開發及軟體工程，版本控制系統
1.協助加速訓練與發展部門數據分析平台和內容數位化開發 2.負責1-2個RPA和Tableau專案，以加速全球訓練執行與成效分析 3.與外部和內部專家合作，有效地將關鍵學習內容進行數位化 職缺需求 1.主修MBA、人力資源管理、資訊管理系統或相關領域研究生，具備RPA和Tableau開發及應用的專業知識。 2.具有團隊合作精神，積極主動，責任心強。
• Conduct regular market analyses and benchmarking studies (e.g., annually or quarterly) to ensure the company's compensation and benefits packages remain competitive and aligned with industry best practices. • Develop and implement comprehensive compensation and benefits initiatives related to fixed pay, incentives, equity plans, and employee benefits, based on the company's business needs. • Act as a resource to business leaders by providing insights & recommendations on compensation practices, ensuring alignment with broader business objectives. • Collaborate with HR Business Partners as a trusted advisor on compensation inquiries, providing guidance to resolve complex cases and ensuring consistent and fair application of policies. • Manage global contingent workforce cost/efficiency in partnership with internal and external stakeholders to ensure compliance to drive project and business success. 職缺需求 • At least over 3 years HR experiences and at least 2 years of demonstrated Compensation & Benefits experience in a large multinational environment or consulting firm • Compensation project management/ program design experience. • Excellent verbal and written communication skills with the ability to interact with all levels of an organization. • Collaborative partner with a customer-centric mindset who thrives in a dynamic and fast-paced environment. • Intensely results focused, and ability to balance urgency and quality • Resilient ability to work under pressure and deal with ambiguity • Strong analytical and problem-solving skills with an ability to manage multiple priorities simultaneously.
As a MediaTek marketing manager, you will be responsible for customer management, product promotion and achieve revenue goal during GTM process, including but not limited to the followings: Strategy planning and execution: major for tablet/eReader/OTT product and other future new products. Value selling MediaTek technology: differentiate MediaTek from ISP, CPU, GPU, AI Processing Unit, Display Technology. Internal team collaboration: quality report preparation and communication (to upper level) with different function units for better execution. 職缺需求 【Qualifications】 1. Master degree from engineering related. EE/CS preferred. 2. At least 10 yrs in semiconductor related experience. 3 yrs RD experience (or above) better. 3. Strong logical thinking and fluent on oral/writing communication for global tier1 customer negotiation. 【Advantageous Experience】 1. Proven record on product marketing. 2. Strong understanding of industry trend (e.g., Matter for Smart Home, AV1/HEVC codecs, low power techniques, xPU spec/performance). 3. Connection in IC industry.
The candidate will conduct functional verification of the RF transceiver circuit design at various stages—from individual circuit blocks to the complete system operation—using behavioral models during the design process. 職缺需求 The ideal candidate should possess a proven history of design verification using behavioral models and a solid understanding of RF transceiver circuits and systems. The qualifications include: 1. An MS or PhD in Electrical and Electronics Engineering, or a related field. 2. Proficiency in behavioral modeling programming languages and strong analytical abilities. 3. A thorough grasp of design verification methodologies applicable to both RF transceiver and digital design verification environments. 4. Knowledge of radio system operation scenarios and the ability to partition system control effectively.
AI Coding Agent 應用 •熟練使用 Claude Code / GitHub Copilot / Cursor 等 AI Coding Assistant 加速開發 •能夠設計並撰寫有效的 Prompt，引導 LLM 生成高品質 EDA 腳本（TCL / Python） •運用 AI Agent 自動化生成、審查與重構 Flow 腳本，提升開發效率 •探索 LLM-based EDA Flow Co-pilot 的可能性，協助工程師做流程決策 •評估並導入 AI Coding 工具至部門開發流程（AI-assisted SDLC） 研究與創新 •追蹤最新 AI for EDA / ML for CAD / LLM for CAD 學術研究與業界趨勢 •與 EDA Vendor（Synopsys / Cadence / …）合作探索 AI 整合方案 •探索 Agentic AI Workflow 應用於多步驟 EDA Flow 自動化 職缺需求 1.必要條件 •程式語言:Python、TCL、Shell Script •ML Framework:PyTorch / TensorFlow / Scikit-learn •數據處理:Pandas、NumPy、SQL •AI Coding工具:Claude Code / Cursor / GitHub Copilot 實際使用經驗 •Prompt Engineering:能有效設計 Prompt 產出可用的工程腳本與代碼 •學歷:電機、資工、電子相關科系 碩士以上 2.加分條件 •有使用 LLM API（Claude / GPT / Gemini）開發內部工具經驗 •了解 RAG（Retrieval-Augmented Generation）架構，能建構 EDA 知識庫問答系統 •有 Multi-agent 系統設計經驗，能協調多個 AI Agent 協作完成複雜 EDA 任務 •了解 Timing Analysis / DRC / IR-drop / Signal Integrity 等物理設計概念 •熟悉 Floorplan / CTS / Routing 等 APR 各階段細節 •有 EDA Flow 開發或 Tape-out 經驗者尤佳
1. 系統軟體平台開發與建置 2. OS / multiple-thread相關實作 3. 平台驗證與AI流程導入設計 4. 硬體平台與實驗設備協助 5. 跨國溝通之技術文件整理 職缺需求 1. 電機工程、電子工程、資訊工程、資訊科學或相關系所在學學生（學士或以上）。 2. 具良好學業表現與扎實數理基礎（例如 GPA 優異、具數理資優或競賽背景）。 3. 熟悉以下至少一種程式語言，並有實際專案經驗：C / C++ / Python（具 C 或 C++ 基礎尤佳） 4. 熟悉基礎電機與系統概念佳, 且對 SoC / 晶片架構有興趣（不要求精通） 5. 對晶片與系統軟體交界領域有強烈好奇心，願意從實作中學習底層原理。 6. 善於團隊合作，樂於與不同背景的人員合作。
我們的使命是運用機器學習與生成式 AI (GenAI) 技術，協助 MediaTek 提升研發效率與工程品質。你將與各部門緊密協作，將業務痛點轉化為 AI 專案，並設計從 PoC 到正式上線的高可用性解決方案，實現可量化的生產力提升。 Key Responsibilities : • 針對研發與營運場景協助 AI 系統架構設計與評估，整合 LLM、Agent 與多模態 AI 等前沿技術，制定最佳落地策略。 • 運用紮實的軟體開發能力負責 GenAI 應用開發與落地，透過 LLM API 敏捷整合至現有工作流與產品中。 • 導入 AI 開發輔助工具並建置 LLMOps 基礎設施，建立 ML CI/CD pipeline 與 K8s 部署環境，實現模型端到端的自動化管理。 • 秉持高標準軟體工程實踐來推動跨團隊協作與交付，與研發及IT 等公司團隊密切配合，確保 AI 解決方案穩定上線。 • 持續評估並導入新技術與工具（如 Opik、Claude Code 等）以引領技術演進，主動推動內部技術分享，建立持續學習的 AI 工程文化。 職缺需求 【基本條件】 • 資訊工程、電機或相關科系碩士（含）以上學歷。 • 具備 2 年以上軟體工程、後端開發或 AI/ML 相關工作經驗。 【必備能力】 • GenAI 實戰經驗：熟悉主流 LLM API 整合與部署，並能運用 RAG、Agent 或 Context Engineering 等核心技術。 • 軟體工程基礎：具備紮實的程式開發與 API 設計能力，熟悉 Git 協作開發流程。 • 系統與維運能力：熟悉 CI/CD 流程、容器化技術（Docker/Kubernetes）及主流資料庫操作（SQL/NoSQL）。 【加分條件】 (Nice to Have) • 進階 AI/ML 技術 - 具備 LLM 訓練、微調 (Fine-tuning) 或模型評估與優化經驗。 - 熟悉主流 LLM 開發框架（如 LangChain、LlamaIndex 等）。 - 具備紮實的機器學習/深度學習基礎，熟悉模型訓練、評估與迭代流程。 • 雲端與系統架構設計 - 熟悉公有雲平台服務（GCP / AWS / Azure）。 - 具備 Production 等級之系統架構規劃、高併發處理或效能優化實踐經驗。 • LLMOps 與專案落地經驗 - 具備完整的 AI/ML 專案落地經驗（從 PoC 概念驗證到 Production 正式上線與維運）。 - 具備 MLOps / LLMOps 實務經驗，或熟悉 LLM 觀測與評估工具（如 LangSmith、Langfuse、Opik 等）。 • 跨部門溝通與軟實力 - 出色的跨背景團隊溝通能力，能有效協助定義需求、撰寫規格化文件與控管專案風險。 - 具備技術分享、內部培訓經驗，熱衷於知識傳承。 - 具備極強的學習敏銳度，能快速掌握新技術並應用於解決實際問題。
IC設計: 晶片整合 IP開發 職缺需求 具備IC設計相關背景及經驗
1. 屬於DE部門 2. 支援 WiFi/BT, 手機與 ARM computing等產品晶片開發計畫的FPGA與Emulation驗證工作與驗證技術開發 3. 主要為獨立貢獻者； 長期可依照潛力培養團隊領導能力，並有機會與全球科技產品的領導廠商有直接溝通合作的機會，可藉此培養個人與跨國的領導企業一起合作技術開發的能力。 4. 工作目標如下: a) 支援計畫功能與系統驗證與除錯 b) 規劃及協調驗證資源、項目及時程 c) 改善和加速multi-FPGA與Emulator工作流程 d) 增進FPGA與Emulator驗證效能 e) 研發SoC系統電路分析工具 職缺需求 Minimum qualifications: 1. 了解FPGA或是Emulation觀念與設計流程 2. 對SoC或IP emulation or prototyping流程曾有經驗者 Preferred qualifications: 1. 了解multi-FPGA開發流程 2. 知曉HAPs or Protium 設計與開發流程 3. 知曉Palladium or Zebu 設計與開發流程 4. 曾參與開發電路分析流程或工具 具備一項以上即可。
1. 規劃NPU量產測試程式 2. 測試及驗證IC功能、性能以及功耗的分析改進 3. 分析測試資料及測試相關問題，並分析良率問題並改善 4. AVS low power 的設計 職缺需求 1.熟悉Verilog/SystemVerilog的語法及撰寫 2. 熟悉IC設計及製造量產流程 額外加分: 1. 熟悉Perl及Python 2. 熟悉low power設計
1. AI processor subsystem架構與RTL設計 2. AI processor subsystem整合驗證與介面設計 3. AI processor subsystem效能與低功耗設計與分析 職缺需求 1. 熟悉數位IC設計. 了解FPGA驗證流程更佳 2. 孰悉SoC系統整合及驗證流程 3. 熟悉SoC系統架構 4. 熟悉Embedded DSP/MCU及AMBA bus介面設計 5. 熟悉Perl, C, Verilog 及power 分析相關tools
1 . 熟悉數位IC整合流程, 包含RTL, 模擬, 時序分析, 功耗分析, 2 . 具類比IC設計的基本知識 3. 混和訊號IC設計經驗是加分項 4 . 系統架構分析經驗是加分項 5 . 具IC量產相關經驗(Ex: DFT, CP, FT)是加分項 職缺需求 1 . 熟悉數位IC設計 2 . 有混合系統設計經驗是加分項 3 . 有系統驗證經驗是加分項
上刊登職缺 
